Introducing:

Mr. James C. Brakefield

13423 Blanco Road #144
San Antonio TX, 78216
US

Short Description:
deep knowledge of many subjects senior member of IEEE and member of ACM
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None
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BUSINESS SUMMARY

Design and implement hardware and/or software, FPGA/CPLD design/development, circuit board design.
Real-time embedded systems design. Engineer, Scientist and Inventor with a career of implementing hardware and software on schedule and budget. Pioneered many new capabilities and facilities. Biomedical modeling and simulation. Lead several successful process transitions for upgrade of computer facilities.

TECHNICAL SKILLS
Research, Reading & Implementation of Scientific Literature, Modeling, Simulation.
Languages: VHDL, Verilog, C#, C++, C, Python, Perl, DOS Batch, Assembler on: PPC, x86, HC12, PDP11, Z80, M6809, I8085, M68000, CDC6600, CDC1604 & IBM1620
CAD Tools: Synplicity, Exemplar, Model Tech, FormalPro, Synopsys
Chips: FPGA, CPLD, micro-processors, RAM, Flash, A2D, D2A, Linear
Hardware: PC, Sun, PowerPC, VAX, PDP11/34, array processors (e.g. DSP)
Application Packages: Excel, Framemaker, Word, IDL (aka PV~Wave), Mercury XRunner
Operating Systems: Windows, Unix, MS-DOS, VMS/VAX, RT-11

SELECTED ACCOMPLISHMENTS
* 50 Publications & Presentations. One patent. Many hardware/software design/develop projects
* Creation and employment of EDA software and spreadsheet regression tools for Lattice Semiconductor. Valued by senior management for competitive software performance tracking.
* Design and implementation of embedded system for telecommunications company.
* Implemented high performance Pentium (x86) emulator in Power PC assembler for IBM.
* Design and implementation of real-time video for scientific experiments.

PROFESSIONAL EXPERIENCE

EW #13710 RESEARCH, San Antonio, Texas 1994 -
* Invented and Own frequently cited patent (US 5,892,697) for floating-point arithmetic offering hardware, software and system improvements over IEEE 754.
* Original Research and publications on:
Hardware/software co-synthesis and unification methodology
Quantitative Memory Oriented approach to computer architecture & digital systems evaluation
Cognitive Systems & Computational Neuroscience feasibility study and neuronal modeling

LATTICE SEMICONDUCTOR, Austin, Texas 1998 - 2002
Senior Software Engineer
* Created regression and experimentation framework combining DOS Batch, Perl and Excel. Allowed unattended and load balanced (often weekend) runs across multiple PCs with spreadsheet results charted and graphed with trend analysis for review by upper management.
* Testing, benchmarking, stress testing and analysis for CPLD & FPGA tools: Internal testing of PLD tools: created regression tools using Perl & DOS Batch; analysis using Excel and visualization tools; competitive benchmarking using Altera and Xilinx tool chains. Used Synopsys Design Compiler, Exemplar, Synplicity, Model Technology, MachXL, Synario, and Lattice place & route tools. Wrote test codes in VHDL. Developed test sets for Verilog & VHDL designs. Organized test/benchmarking suites.

DATARACE INC., San Antonio, Texas 1996 - 1998
Senior Engineer
As part of BeThere! product line, designed telecom PC card with T1 interface (24 phone lines), created and tested it's embedded software. Firmware completed in four months and worked perfectly.

XXCAL, Austin, Texas 1995 - 1996
Software Development
High performance Pentium emulation on PowerPC: Wrote in PowerPC assembler to implement x86 emulator. Used test cases to verify code. Tools used included EMACS19, M4, x86 assembler and C. This integrated and finished work of six others. Member of 12 person team to convert C code to assembler (x86 call gates and task gates).

AT&T SCO and KARTA TECHNOLOGY INC., San Antonio, Texas 1994
Instructor
I-CASE course development for Functional Analyst: Preparation of a course teaching modern large-scale software development (Logicon contract to DOD thru AT&T Services division). Learn, rationalize & teach Yourdon methodology. Lectures on UNIX/Sun 101 and Mercury XRunner software regression framework.

CONCEPTUAL MINDWORKS INC., San Antonio, Texas 1992 - 1993
Senior Research Engineer
Designed and wrote software for 3D reconstruction of signal traces from stereo X-ray images of printed circuit boards. Provided test cases for conversion of software from PV~Wave to C. Wrote NIH proposal for analysis of stereo retinal photographs. Wrote and edited Small Business Innovative Research (SBIR) reports.

KRUG LIFE SCIENCES, San Antonio & Houston, Texas 1975 - 1992
Senior Research Engineer
* Made productive several generations of computer facilities: PDP11, microVAX, Sun SPARC and Ethernet. Networked computer facilities planned, purchased, installed & maintained.
* Designed and implemented hardware and software for real-time video display generator for vision testing in research lab. For 10 years it offered capabilities found nowhere else (real-time video at 60 frames/sec, 36-bit calibrated video display). Designed and implemented image processing package for mega-pixel images which ran on 16-bit mini-computer. Designed, implemented, refined and published user interface software used in most experiments - order of magnitude improvement in time to program and adjust user interface, and took less memory than Fortran I/O library. Adapted plotting package to a variety of laboratory equipment (graphics CRT, dot-matrix printer, XY plotter).
* Implementation of experiments for scientists: Digital circuit design, analog circuit design, applications programming, real-time programming, systems integration, modeling, simulation, trade-off studies, vendor selection, image processing, technical reports and journal papers, assisting scientists, supervising and mentoring engineers and technicians.
* At NASA Houston, implemented life sciences experiment (metabolic analyzer) - was operational within three months and booted from PROM.

UNIVERSITY OF TEXAS AT SAN ANTONIO, San Antonio, Texas 1991 & 2003
Instructor & Adjunct Professor
Taught Engineering Economics to engineering seniors.
Taught Logic Design and Micro-Computer Programming courses.

BBL RESEARCH INC., San Antonio, Texas 1991
Research
Studied use of FPGA's for non-linear signal processing in a SDI (star wars) context.

EDUCATION
M.S. Electrical Engineering; M.S. Computer Science; B.S. Applied Mathematics
University of Wisconsin, Madison, Wisconsin

HONORS AND PROFESSIONAL AFFILIATIONS
Who's Who in Frontier Science and Technology; American Men and Women of Science
Institute of Electrical and Electronic Engineers (IEEE), Senior Member
Association for Computing Machines (ACM)

PUBLICATIONS/PRESENTATIONS
Over 50 (available on request); Software & hardware documentation
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